1. Field of the Invention
The present invention relates to an inductive element or inductor and more particularly, to a planar-type inductor formed on an insulating substructure and a fabrication method thereof.
2. Description of the Prior Art
A planar-type inductor formed over a semiconductor substrate is one of the types of the conventional inductors that have been popularly used in a Monolithic Microwave Integrated Circuit (MMIC) device. The planar-type inductor typically has a ribbon or spiral configuration which includes a conductor ribbon or spiral formed over a semiconductor substrate through an insulating layer on the substrate.
An example of the conventional planar-type inductors having the spiral configuration is shown in FIGS. 1 and 2.
As seen from FIGS. 1 and 2, this conventional inductor includes an insulating substructure composed of a semiconductor substrate 111, a first insulating layer 112 formed on a chief surface of the substrate 111, and a second insulating layer 114 formed on the first insulating layer 112 and having a groove 114a and two contact holes 116a and 116b. The surface of the second insulating layer 114 constitutes a chief surface of the substructure.
The contact holes 116a and 116b vertically extend perpendicular to the chief surface of the substrate 111. The groove 114a horizontally extends along the chief surface of the substrate 111 between the contact holes 116a and 116b.
A first patterned conductor layer 113 is formed on the first insulating layer 112. The layer 113 is buried within the groove 114a of the second insulating layer 114, and runs from a position corresponding to the inner contact hole 116a to another position corresponding to the outer contact hole 116b.
As clearly shown from FIG. 1, a second patterned conductor layer 110 is formed on the surface of the second insulating layer 114. The second conductor layer 110 contains an inductance part 1' for providing a wanted inductance value and first and second lead parts 2' and 3' for electrically connecting the inductance part 1' to an external circuit located outside the inductor. The inductance part 1' has a square spiral shape. The first lead part 2' has a strip-like shape and is joined to the outer end of the part 1'. The second lead part 3' also has a strip-like shape; however, it is formed apart from the inductance part 1'.
The contact hole 116a of the second insulating layer 114 is located at the inner end of the inductance part 1', in other words, at the center of the spiral pattern. The inner end of the inductance part 1' is electrically connected to one end of the underlying first conductor layer 113 through the hole 116a. The second lead part 3' is electrically connected to the other end of the underlying first conductor layer 113 through the hole 116b. Thus, the inner end of the inductance part 1' is electrically connected to the second lead part 3' through the first conductor layer 113. This means that the patterned first conductor layer 113 serves as an interconnection conductor for the inner end of the inductance part 1' and the second lead part 3'.
The second conductor layer 110 has a two-layer structure made of a lower conductive sublayer 110a and an upper conductive sublayer 110b. The lower conductive sublayer 110a is contacted with the first conductor layer 113 and the second insulating layer 110. The upper conductive sublayer 110b is formed onto the lower conductive sublayer 110a. The lower sublayer 110a serves as a current path for forming the upper sublayer 110b by a plating process.
Between any two neighboring regions of the spiral-shaped inductance part 1' of the conductor layer 110, the second insulating layer 114 is exposed.
The first insulating layer 112 serves to electrically insulate the first conductor layer 113 from the underlying substrate 111. The second insulating layer 114 serves to electrically insulate the second conductor layer 110 from the underlying first conductor layer 113; in other words, the layer 114 serves as an interlayer insulating layer.
The inductance value of the conventional inductor shown in FIGS. 1 and 2 can be expressed as the following equation (1), which was obtained through experiments. ##EQU1## where L is the inductance (nH), D is a length (mm) of one side of the spiral-shaped inductance part 1', p is a width (mm) of the spiral-shaped conductor layer 110 of the inductance part 1', q is an interval (mm) between the neighboring regions of the spiral-shaped conductor layer 110, and r is a ratio of p to q, i.e., (p/q).
When p=q, the equation (1) is simplified to the following equation (2): ##EQU2##
For example, if p=q=0.05 mm and D=0.5 mm, the inductance L is calculated from the above equation (1) or (2) as approximately 2 nH.
Recently, to decrease the size and fabrication cost of a semiconductor integrated circuit device, not only active components (e.g., transistors) but also passive components (e.g., inductors and capacitors) have been required to be miniaturized more and more.
For the above planar-type inductors, the miniaturization requirement is typically accomplished by decreasing the size of the spiral-shaped conductor layer 110. In other words, this problem is solved by reducing the size of the width p and the interval q.
For example, if p=0.05 mm, q=0.1 mm and D=0.64 mm, the inductance L is calculated from the above equation (1) to be approximately 2 nH. If the spiral-shaped conductor 110 having this dimension is formed on a GaAs substrate, the inter-line capacitance C of the conductor 110 is equal to approximately 0.12 pF. This value is obtained by an approximation of regarding the two neighboring regions of the spiral-shaped conductor 110 as a coplanar strip lines.
The resonance frequency f.sub.0 in this case is approximately equal to 10.3 GHz, where f.sub.0 is defined as the following equation (3): ##EQU3##
To reduce the plan size of the spiral-shaped conductor 110 to 60% of its original size, if the above parameters are designed as p=q=0.05 mm and D=0.5 mm, the inductance L can be maintained at approximately 2 nH. However, the inter-line capacitance C of the conductor 110 increases up to approximately 0.14 pF and as a result, the resonance frequency f.sub.0 will decrease to approximately 9.5 GHz, which is lower than the case of the original size by approximately 0.8 GHz.
Thus, with the conventional inductor shown in. FIGS. 1 and 2, when the interval q of the neighboring regions of the spiral-shaped conductor 110 is decreased for miniaturization, the inter-line capacitance C will increase and the resonance frequency f.sub.0 will decrease and consequently, a problem that the maximum operable frequency is lowered occurs.